[PRNewswire] Faraday Introduces UrLib+™ Add-on Library on UMC 40LP Process
[편집자 주] 본고는 자료 제공사에서 제공한 것으로, 연합뉴스는 내용에 대해 어떠한 편집도 하지 않았음을 밝혀 드립니다.
(HSINCHU, Taiwan, May 16, 2017 PRNewswire=연합뉴스) Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today introduced its new UrLib+™ [http://www.faraday-tech.com/html/Product/IPProduct/LibraryMemoryCompiler/UrLib.htm ] add-on library for the third-party library on UMC 40LP process technology. UrLib+ [http://www.faraday-tech.com/html/Product/IPProduct/LibraryMemoryCompiler/UrLib.htm ] is a library package, featuring extra sets of cells for optimized PPA (Power/Performance/Area), yield controllability, clock tree noise reduction, robust ESD protection, and lower ECO cost over the traditional physical libraries.
By utilizing Faraday's 24-year experiences in library development and ASIC implementation, UrLib+ can be seamlessly integrated with the existing third-party library on UMC 40LP process to improve the routing results and yield for mass production. With UrLib+ supported, the CPU core can save around 43% of clock tree power and up to 15% of total power. For the routability efficiency, UrLib+ can shrink the die size from 4% to 11% depending on the design architecture and cell mapping flow. UrLib+ solution is not only dedicated for 40LP, Faraday also supports UrLib+ porting service for other third-party libraries or technology platforms.
"Library design is the foundation of IC design. Driven by ASIC product diversification, Faraday always has unique ideas and practices in library design," said Steve Wang, President of Faraday. "In the UMC's advanced processes, the continuous realization of the library improvements is our persistent goal. We believe UrLib+ is a win-win-win solution for IC design house, fab, and third-party library vendor."
About Faraday Technology Corporation
Faraday Technology Corporation (TWSE: 3035) is a leading ASIC design service and IP provider. The broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDR2/3/4, low-power DDR1/2/3, MIPI, V-by-One, USB 2.0/3.1 Gen 1, 10/100/1000 Ethernet, Serial ATA, PCI Express, and programmable SerDes, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. For more information, visit www.faraday-tech.com or follow Faraday on LinkedIn [https://www.linkedin.com/company/faraday ].
Source: Faraday Technology Corporation
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<저작권자(c) 연합뉴스, 무단 전재-재배포 금지>
[편집자 주] 본고는 자료 제공사에서 제공한 것으로, 연합뉴스는 내용에 대해 어떠한 편집도 하지 않았음을 밝혀 드립니다.
(HSINCHU, Taiwan, May 16, 2017 PRNewswire=연합뉴스) Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today introduced its new UrLib+™ [http://www.faraday-tech.com/html/Product/IPProduct/LibraryMemoryCompiler/UrLib.htm ] add-on library for the third-party library on UMC 40LP process technology. UrLib+ [http://www.faraday-tech.com/html/Product/IPProduct/LibraryMemoryCompiler/UrLib.htm ] is a library package, featuring extra sets of cells for optimized PPA (Power/Performance/Area), yield controllability, clock tree noise reduction, robust ESD protection, and lower ECO cost over the traditional physical libraries.
By utilizing Faraday's 24-year experiences in library development and ASIC implementation, UrLib+ can be seamlessly integrated with the existing third-party library on UMC 40LP process to improve the routing results and yield for mass production. With UrLib+ supported, the CPU core can save around 43% of clock tree power and up to 15% of total power. For the routability efficiency, UrLib+ can shrink the die size from 4% to 11% depending on the design architecture and cell mapping flow. UrLib+ solution is not only dedicated for 40LP, Faraday also supports UrLib+ porting service for other third-party libraries or technology platforms.
"Library design is the foundation of IC design. Driven by ASIC product diversification, Faraday always has unique ideas and practices in library design," said Steve Wang, President of Faraday. "In the UMC's advanced processes, the continuous realization of the library improvements is our persistent goal. We believe UrLib+ is a win-win-win solution for IC design house, fab, and third-party library vendor."
About Faraday Technology Corporation
Faraday Technology Corporation (TWSE: 3035) is a leading ASIC design service and IP provider. The broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDR2/3/4, low-power DDR1/2/3, MIPI, V-by-One, USB 2.0/3.1 Gen 1, 10/100/1000 Ethernet, Serial ATA, PCI Express, and programmable SerDes, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. For more information, visit www.faraday-tech.com or follow Faraday on LinkedIn [https://www.linkedin.com/company/faraday ].
Source: Faraday Technology Corporation
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